# HG changeset patch # User iuc # Date 1729793450 0 # Node ID d6d746d0d1d05cbe641877c9a1d7b386e0461cf9 # Parent 36c91ff33d70f38536f390f949337f16bb6cea24 planemo upload for repository https://github.com/jonas-fuchs/varVAMP commit 938f80815419af5d560f949d884989cf1d69550d diff -r 36c91ff33d70 -r d6d746d0d1d0 macros.xml --- a/macros.xml Sat Jun 15 15:43:28 2024 +0000 +++ b/macros.xml Thu Oct 24 18:10:50 2024 +0000 @@ -1,7 +1,7 @@ - 1.2.0 - 1 + 1.2.1 + 0 diff -r 36c91ff33d70 -r d6d746d0d1d0 test-data/ambiguous_consensus.fasta --- a/test-data/ambiguous_consensus.fasta Sat Jun 15 15:43:28 2024 +0000 +++ b/test-data/ambiguous_consensus.fasta Thu Oct 24 18:10:50 2024 +0000 @@ -1,2 +1,2 @@ ->ambiguous_consensus +>AMPLICON_consensus tatcccgtrtycaractgayatccttattaayytgatgcaaccycgrcagcttgtkttccgrccygaagtyytstggaaycayccgatccagcgrgtyatacataatgagctggagcartactgccgwgcycgygctggycgytgyctkgargtkggsgcycayccaagatcyatyaatgayaacccyaatgtyytgcaccggtgcttyctycgcccggtyggdagagaygtmcagcgytggtaytcygccccsacycgyggyccagcggcyaaytgccgccgytcygcgctacgyggyytgccccctgtcgaycgyacmtaytgcttcgacgggttytcccgctgcgcytttgccgctgagacyggratygctttataytcactrcatgacctytggccytcggaygtygcggaggcya diff -r 36c91ff33d70 -r d6d746d0d1d0 varvamp.xml --- a/varvamp.xml Sat Jun 15 15:43:28 2024 +0000 +++ b/varvamp.xml Thu Oct 24 18:10:50 2024 +0000 @@ -8,14 +8,17 @@ varvamp - primer3-py + primer3-py seqfold + python + coreutils varvamp --version results/primers_headerless.bed +#end if #if $mode.m_select == 'qpcr' and $mode.scheme_outputs and 'primer_seqs' in $mode.scheme_outputs: ## make the primer sequences fasta discoverable under the same name that is used in "single" mode && mv results/oligos.fasta results/primers.fasta #end if #if $mode.m_select == 'tiled' and $mode.scheme_outputs and 'primer_dimers' in $mode.scheme_outputs: ## ensure the unsolvable_primer_dimers.tsv file, which varVAMP creates only conditionally, exists in all cases, in which we try to discover it as an output - && cp -n dimers_fallback.tsv results/unsolvable_primer_dimers.tsv + && cp --update=none dimers_fallback.tsv results/unsolvable_primer_dimers.tsv #end if ]]> @@ -118,6 +126,7 @@ + @@ -142,6 +151,7 @@ + @@ -158,6 +168,7 @@ + @@ -210,10 +221,10 @@ mode['m_select'] == 'tiled' and mode['scheme_outputs'] and 'primer_seqs' in mode['scheme_outputs'] - - + + - + mode['scheme_outputs'] and 'primer_binding_sites' in mode['scheme_outputs'] @@ -344,13 +355,13 @@ - + - +